Radiation Hardness of FE ASICs
The VDC and DORIC chips have been prdouced in the AMS 0.8 micron Bi-CMOS
process. This is not a qualified radiation hard process but only npn transistors
have been used in a conservative design to maximise the radiation tolerance
of the chips. The transistors are run at high values of beta to minimise
the radiation induced changes in beta. A conservative design has been used
in order to minimise sensitivity to any changes in beta.
A sample of 20 DORIC4s were irradiated with 3 10**14 n/cm**2 at the
Ljubljana reactor. They all worked correctly after the irradiation. These
20 chips were then irradiated to a dose of 10 MRad with a Co source at
Birmingham. The chips were powered during the Co irradiation and the currents
monitored. There were no significant changes in current during irradiation.
The chips all worked correctly after this irradiation and there was no
measurable detiroration in performance.
A sample of 9 VDCs were irradiated with 3 10**14 n/cm**2 at the Ljubljana
reactor. They all worked correctly after irradiation with no significant
changes. They have beeen radiated to 10 MRad with the Co source at
Birmingham. 2 chips were mechanically damaged and on those chips only one
channel works. On the other 7 chips both channels worked after the irradiation
with no signifiant change in performance. The chips were powered during
the gamma irradiation.
Test transistors were laid out in the VDC chip. The performance of irradiated
and unirradiated single transistors has been measured . Accelerated ageing
tests have also been performed on the irradiated DORIC4 and VDC chips.
A paper (accepted for publication in NIM) on the radiation testing of DORIC4
and VDC is available here (pdf
file).
. A sample of 9 DORIC4A chips have been irradiated
with 2 10**14 n/cm**2 and 50 MRad. They all work after these irradiations.
More information is availablee here (pdf
file) .
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Weidberg