PCB name |
PCB version |
HV2FEI4 |
irradiated |
location |
status HV2FEI4 |
status FEI4 |
FEI4 wafer |
FEI4 type/ number |
Date of wirebonding |
comments |
C01 |
|
|
|
|
|
|
|
|
|
never existed |
C02 |
|
v1 |
0 |
CERN |
working? |
working? |
VGAKHXH |
38? (see photo) |
|
first good v1 CCPD |
C03 |
|
|
|
|
|
|
|
|
|
PCB not existing |
C04 |
|
|
|
|
|
|
|
|
|
PCB not existing |
C05 |
PCBv3 |
v1 + v1 |
0 |
CERN |
not working |
working |
VGAKHXH |
43 |
2013-04-15 |
sensor crooked, low sensor tuning was possible (100mV) |
C06 |
PCBv3 |
v1 + v1 |
0 |
CERN |
dismounted |
dismounted |
VGAKHXH |
33 |
2013-04-15 |
badly glued HV2FEI4 is wirebonded |
C07 |
PCBv3 |
v1 |
1.00E+015 |
CERN |
working |
working |
VGAKHXH |
52 |
2013-05-08 |
|
C08 |
PCBv3 |
v1 |
1.00E+016 |
CERN |
not working? |
working? |
VGAKHXH |
53 |
2013-05-08 |
|
C09 |
PCBv3 |
v2 |
0 |
CERN |
working |
working |
VGAKHXH |
32 ? |
|
first good v2 CCPD |
C11 |
PCBv4 |
v2 |
0 |
CERN |
debugging not finished |
working? |
? |
? |
Oct. 2013? |
(formerly DE1) |
C12 |
PCBv4 |
v2 |
0 |
Glasgow |
debugging not started |
not checked |
|
|
2014-01-30 |
“Glasgow board” (formerly D03) |
C13 |
PCBv3-mirrored |
v1 |
yes, which dose? |
CERN |
debugging not finished |
working |
VGAKHXH |
35 |
2014-03-26 |
“mirrored” sensor |
C14 |
PCBv3-mirrored |
|
yes: which does? |
CERN |
debugging not finished |
debugging not finished |
VGAKHXH |
45 |
2014-03-26 |
“mirrored” sensor |
C15 |
v5 |
v2 |
0 |
CERN |
|
|
|
|
2014-07-03 |
|
C16 |
v5 |
v2 |
0 |
CERN |
debugging |
not checked |
|
|
|
|
C17 |
v5 |
v2 |
? |
CERN |
|
|
|
|
|
|
C18 |
v5 |
v2 |
? |
CERN |
|
|
|
|
|
|
C19 |
v5 |
v2 |
0 |
CERN |
OK |
OK |
|
|
2014-08-22 |
|
not on PCB yet |
|
v2 |
0 |
CERN – Lab 023 |
? |
? |
VGAKHXH |
54 |
|
single CCPD not glued on any PCB, HV2FEI4 glued together with FEI4 nr 32? (which is on C09) |
SINGLE PCB's |
|
PCBv3-mirrored |
|
0 |
CERN |
- |
- |
|
|
|
PCB produced and assembled, no FEI4 or sensor on it |
SINGLE FEI4's |
|
|
|
0 |
CERN |
|
not checked |
VGAKHXH |
44 |
|
single FEI4A in gelpack |
|
|
|
0 |
CERN |
|
not checked |
VGAKHXH |
34 |
|
single FEI4A in gelpack |
Discontinued assemblies
Wirebonding scheme AMS CCPD to HVCMOS2FE -I4B SCC v2
PCB |
CCPDv4 |
CCPDv5 |
H35CCPDv1 |
Pad |
Function |
Net |
Pad |
Function |
Pad |
Function |
Pad |
Function |
0 |
SerOutDown |
HVCMOS_SRout |
|
|
|
|
|
|
1 |
NwellRing |
NwellRing/GND |
|
|
|
|
|
|
2 |
VN |
ISRC0 |
|
|
|
|
|
|
3 |
Vpload |
ISRC1 |
|
|
|
|
|
|
4 |
VPFB |
ISRC2 |
|
|
|
|
|
|
5 |
VNFoll |
ISRC3 |
B1 |
SO |
|
|
D1 |
VP |
6 |
BLRes |
ISRC4 |
|
|
|
|
C1 |
VN |
7 |
Icomp |
ISRC5 |
|
|
|
|
B1 |
Casc |
8 |
VddaBias |
HVCMOS_VDDA |
|
|
|
|
|
|
9 |
VSSA |
HVCMOS_VSSA |
1 |
vssa |
1 |
vssa |
1 |
vdda |
10 |
Vdda |
HVCMOS_VDDA |
2 |
vdda |
2 |
vdda |
2 |
vssa |
11 |
GND |
GND |
3 |
gnda |
3 |
gnda |
3 |
gnda |
12 |
Vcasc |
HVCMOS_Vcasc_chip |
4 |
Vcasc |
4 |
ThTw |
4 |
casc nmos |
13 |
ThPlow |
HVCMOS_ThPLow_chip |
5 |
HVPlus |
5 |
VPlusTw |
5 |
Sens Bias |
14 |
Gate |
HVCMOS_Vgate_chip |
6 |
Gate |
6 |
Gate |
6 |
Vplus |
15 |
BL |
HVCMOS_BL_chip |
7 |
BL |
7 |
BL |
|
|
16 |
Th |
HVCMOS_Vthr_chip |
8 |
Th |
8 |
Th |
|
|
17 |
GND |
GND |
|
|
|
|
|
|
18 |
Sout |
HVCMOS_SoutOrSub |
|
|
|
|
8 |
SUB Pix |
19 |
GND |
GND |
9 |
gnd |
9 |
gnd |
|
|
20 |
Vddd |
HVCMOS_VDDDorSub |
10 |
vdd |
10 |
vdd |
9 |
SUB Guard |
21 |
HV |
HVCMOS_Vbias |
11 |
SUB |
11 |
SUB |
10 |
SUB |
22 |
Srin |
HVCMOS_SRdi |
12 |
Sin |
12 |
Sin |
11 |
Sin |
23 |
Ld |
HVCMOS_SRld |
13 |
Ld |
13 |
Ld |
12 |
Ld |
24 |
CkConfig |
HVCMOS_SRclkPix |
14 |
CkC |
14 |
CkC |
13 |
Ck2 |
25 |
CkDAC |
HVCMOS_SRclkGlo |
15 |
CkD |
15 |
CkD |
14 |
Ck1 |
26 |
MonOutP |
HVCMOS_Mon_P |
B7 |
MonP |
B? |
MonP |
|
|
27 |
nReset |
VMI2 |
16 |
VMi2 |
16 |
VMi2 |
|
|
28 |
VdddIO |
HVCMOS_VDDA |
|
|
|
|
|
|
29 |
VddaIO |
HVCMOS_VDDA |
|
|
|
|
|
|
30 |
Monitor |
HVCMOS_Mon |
17 |
Mon |
17 |
Mon |
|
|
31 |
Injection |
HVCMOS_inj |
18 |
Inj |
18 |
Inj |
15 |
inj |
32 |
GND |
VMI1 |
19 |
VMi1 |
19 |
VMi1 |
16 |
gnda |
33 |
Vdda |
VMI0 |
20 |
VMi0 |
20 |
VMi0 |
17 |
vssa |
34 |
VSSA |
VPLUS |
21 |
VPl |
21 |
VPl |
18 |
vdda |
35 |
AmpOut |
HVCMOS_AmpOut |
22 |
AmpOut |
22 |
AmpOut |
|
|
36 |
VddaBias |
HVCMOS_VDDA |
|
|
|
|
|
|
37 |
Pbias |
HVCMOS_Pbias_ADC |
|
|
|
|
|
|
38 |
GND |
GND |
|
|
|
|
|
|
39 |
IPUP |
ISRC6 |
|
|
|
|
19 |
mn0 |
40 |
WGT0 |
ISRC7 |
|
|
|
|
20 |
mn1 |
41 |
WGT1 |
ISRC8 |
|
|
|
|
21 |
mn2 |
42 |
WGT2 |
ISRC9 |
|
|
|
|
|
|
43 |
LSBdacL |
ISRC10 |
|
|
|
|
|
|
44 |
MonOutN |
HVCMOS_Mon_N |
B8 |
MonN |
B? |
MonN |
|
|
45 |
BackBias |
BackBias/GND |
|
|
|
|
|
|
The SCC can be configured for various HV/HRCMOS sensors by several THT jumpers and 0Ohm SMD resistors.
FE-I4 operation
General
- VCasc: Except for H18CCPDv2 VCasc is generated on chip and does not need to be supplied by the board.
=> For all chips except H18CCPDv2 do not set the VCasc jumper
Monitor line
The monitor signal from the CCPD is amplified via a two stage amplifier, then discriminated and sent to the corresponding KEL pin (
TODO). After the first amplifier the signal has a baseline of around 1.8V with the monitor signal on top. Therefore the discriminator threshold has to be set accordingly.
- Option 1 (Voltage divider)
Choose R50 and R51 according to V_mon_th = 3.3V R51/(R50 + R51). They should be around 100k.
- Option 2 (Voltage supply from GPAC card reusing VCasc line) (TODO: Kel pin)
Remove R50 and R51 and set Rcmpthr
- Option 3 (discouraged, Current supply from GPAC) (TODO: Kel pin)
TBD
Test points
Board input |
Component |
Alternative |
Wirebonding pad |
Function H18v4 |
Function H35v1 |
Comment |
GND |
Rmi2b |
CONCCPDv4 |
VMI2 |
VMinus2 (STime) |
|
|
HVCMOS_nReset |
Rmi2 |
|
|
|
GND |
Rmi1b |
VMI1 |
VMinus1 (STime) |
|
|
GND |
Rmi1 |
|
GNDA |
|
GND |
Rmi0b |
VMI0 |
VMinus0 (STime) |
|
|
HVCMOS_VDDA |
Rmi0 |
|
VSSA |
VDDA, VSSA swapped on H35 |
HVCMOS_VDDA |
Rplub (bottom) |
VPLUS |
VPlus (STime) |
|
|
HVCMOS_ThPlow |
Rplub (top) |
|
|
|
HVCMOS_VSSA |
Rplu |
|
VDDA |
VDDA, VSSA swapped on H35 |
|
HVCMOS_VDDD |
Rsubguard |
|
HVCMOS_VDDDorsub |
VDDD |
|
|
HVCMOS_Vbias |
Rsubguard2 |
|
|
SUB Guard |
if needed |
|
HVCMOS-Sout |
Rsubpix |
|
HVCMOS_Soutorsub |
|
|
|
HVCMOS_Vbias |
Rsubpix2 |
|
|
SUB Pix |
if needed |
|
HVCMOS_ThPlow |
Sel_ThPlow 1-2 |
|
HVCMOS_ThPlow_chip |
|
|
|
Hvpos (LEMO) |
Sel_ThPlow 2-3 |
|
HVPlus |
|
Do not use with SUB/HV |
|
HVCMOS_Vcasc |
VCasc |
|
HVCMOS_VCasc_chip |
|
|
VCasc generated on chip |
|
HVCMOS_BL |
BL |
|
HVCMOS_BL_chip |
BL |
|
|
|
HVCMOS_Vthr |
VThr |
|
HVCMOS_Vthr_chip |
Global threshold |
Global threshold |
|
|
GND |
Rmon0 |
|
ISRC6 |
|
Pull down mon 0 |
|
Vmon0 |
Pin header |
|
|
mon 0 |
|
ISRC6' |
Rsc6 |
|
|
|
|
|
GND |
Rmon1 |
|
ISRC7 |
|
Pull down mon 1 |
|
Vmon0 |
Pin header |
|
|
mon 1 |
|
ISRC7' |
Rsc7 |
|
|
|
|
|
GND |
Rmon2 |
|
ISRC8 |
|
Pull down mon 2 |
|
Vmon0 |
Pin header |
|
|
mon 2 |
|
ISRC8' |
Rsc8 |
|
|
|
|
|
HVCMOS_VDDA, GND |
R50,R51 |
|
HVCMOS_mon_comp_THR |
|
|
Voltage divider |
HVCMOS_VCasc |
Rcmpthr |
|
|
|
VCasc by GPAC |
CompTHRIn, GND |
RcmpthrIn, R51 |
|
|
|
Generate voltage via ISRC11 flowing over R51 to GND, use high quality resistor |
|
AmpMon _out |
mon_amp_sel 1-2 |
|
HVmonSelect 1-2 |
HVCMOS_mon_ADC |
|
|
Comp_out |
mon_amp_sel 2-3 |
|
HVmonSelect 2-3 |
Mon (Pin header) |
|
|
|
GND |
Cvp |
|
ISRC3 |
|
|
|
GND |
Cvn |
|
ISRC4 |
|
|
|
GND |
Ccasc |
|
ISRC5 |
|
|
|
GND |
Cthplow |
|
HVCMOS_ThPlow_chip |
|
|
|
--
BranislavRistic - 17 Jun 2014