In firmware v9, register 80 is defined as:
0x80 r/w write to this register start the sequencer.
read:
bit 31 readout busy
bit 30-8 not used
bit 7-5 number of free buffer available
bit 4 if 1, infinite daq loop started.
bit 3-2 specify which of the four buffers available to be used
bit 1 if 1, reads both counter and memory data. Otherwise only
counters are read.
bit 0 if 1, is calibration
Bits 7-5 (number of free buffers) is set to '100' (4) on reset.
Poll bit 7, when it goes from '1' to '0' it means at least one
buffer has data to read out.
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EricHazen - 2015-11-04