Register File Set Up

  • *TO DO* Code Up Register File to match top registers register behaviour
  • *TO DO* Connect up to TB infrastructure - changes to sequencer -> driver communication
  • *TO DO* Modification to Scoreboards to use correct set up

DUT and TOP module modifications to support a more efficient MSIE

  • *TO DO* Code up "unit chip DUTs"
  • *TO DO* Unit DUT with binding of DAC Assertion Checker; bind matrix frame slicer; bind matrix inj interface
  • *TO DO* Unit DUT with a bbox-ed Matrix
  • TO DO Code up DUTs comprised of "unit chip DUTs"
  • *TO DO* A single INNER Chip DUT
  • *TO DO* An IB collection of 9/18 chips using unit DUT with bbox-ed Matrix
  • *TO DO* An OB with Master + # of slaves?

LOW Priority - DCTRL BFM - change to dynamic implementation

  • *TO DO* Code up virtual base classes for BFM wrapper and for the BFM class itself
  • *TO DO* Code up extended BFM wrapper and BFM class with relevant properties included - thereby making BFM configurable
  • * TO DO* Changes to infrastructure to accommodate new dynamic BFM instantiation. Shouldn't require any changes to classes that use it directly (monitor, driver)

-- SvetlomirHristozkov - 2015-06-10

Edit | Attach | Watch | Print version | History: r1 | Backlinks | Raw View | WYSIWYG | More topic actions
Topic revision: r1 - 2015-06-10 - unknown
 
    • Cern Search Icon Cern Search
    • TWiki Search Icon TWiki Search
    • Google Search Icon Google Search

    Main All webs login

This site is powered by the TWiki collaboration platform Powered by PerlCopyright &© 2008-2024 by the contributing authors. All material on this collaboration platform is the property of the contributing authors.
or Ideas, requests, problems regarding TWiki? use Discourse or Send feedback