Wire Bonding Information

ABC250 Petalet Wirebonding Patterns

See wire bonding manual here.

ABC130 Petalet Wirebonding Patterns

Information for wirebonding patterns here and here.

Programming the Wirebonder

In order to write a wire bonding program for a surface with multiple, repeating dyes (e.x.: 250 hybrid with 12 ASICs), it is simplest and most efficient to write a "Parent" program for a single dye, and then copy that Parent program as a series of "Children" which are positioned according to the fiducials. This way, if you have to adjust the parameters or positions of a few of the wire bonds, these adjustments are carried through from the Parent to all of the Children, greatly simplifying the process of writing a working and optimized wire bonding program. Here I describe the basic steps of writing such a program. I will describe the steps in terms of the ABC250 Upper Hybrid as a concrete example.

Disclaimer: this is not meant to be a detailed instruction manual on how to write a program from scratch, but just how to go about copying a parent program into several children. Just keep this in mind, because it is possible that steps are missing!

To write the ABC250 Upper Hybrid program, we define four chips. Each chip corresponds to a surface that we want to wire bond. Chip 1 is the top row of ASICs, Chip 2 is the top half of the hybrid, Chip 3 is the bottom row of ASICs, and Chip 4 is the bottom half of the hybrid. i.e.:

We start by creating Parent Module 1, Module 1. Do this in the standard way that you would create a wire bonding program (learn chip to input fiducials, adjust, normalize, etc). The Parent Module 1 corresponds to the upper left ASIC in the figure. For the wire bonds, we place the wire from Chip 1 (ASIC side) to Chip 2 (hybrid side), or vice versa if necessary. We ignore Chips 3 and 4 for now.

Once Parent Module 1, Module 1 is finished, we copy it by creating children. These children are defined as Modules 2, 3, 4, 5, and 6, and they correspond to the rest of the ASICs in the top row of the Figure.

Now, because the ASICs in the bottom row are rotated, we cannot copy Parent Module 1 from the top row to the bottom row (the wire bonder does not allow for this functionality). We now need to create a new parent module. This is done using repeat module with "parent" selected. The new module will be called Parent Module 2, Module 7, and it inherits Chips 1,2,3, and 4 from the original parent (Parent Module 1, Module 1). Since Parent Module 2, Module 7 is for the rotated ASIC, we need to ``learn chip'' again to input the fiducials for chips 3 and 4. For bonding, we now place wires from Chip 3 (ASIC side) to Chip 4 (hybrid side). We then copy Module 7 by creating Children Modules 8, 9, 10, 11, and 12.

note 1: When making the parent module for the bottom row using repeat module, Parent Module Number 2 is for the copy. When making the children of the second parent, the module number of the parent that you input is Module Number 7.

note 2: We defined chips 1, 2, 3, and 4 at the beginning because we needed two extra chips in order to create Parent 2 Module 7. The wire bonder would not allow us to copy a second parent using chips that were already in use by the first parent module, and we could not create new chips on the fly. Apparently, all chips that will be used in the program MUST be defined in the original parent module.

note 3: PRU’s (Pattern Recognition Unit) were lost for Chips 1 and 2 after copying the second parent, so had to remake the fiducials for the top row of ASICs. Once we did that, we had no other issues with the program.

note 4: since the ABC130 petalet hybrids are curved, you cannot use this approach (parents & children) to make the wirebonding program - everything has to go in manually.

Problems and Solutions for Wire Bonding

Here we list some problems we had while wire bonding, and our solutions.

1. The Children of the Parent do not translate properly - positions of the wires are off, and they get worse as you move farther away from the parent.
   • Solution: We did not copy over the children properly. Every time you copy a child, you have to ``Adjust''. If you just copy a child, this only defines a search area but doesn't actually located anything. Adjust is what actually calculates the positions of the ASICs based on where the fiducials are. After ``Adjust'' you also have to ``Normalize''.
   • note on normalizing in wire bonding:
     You start with the theoretical and actual location of the sample as the same.
     If you take the sample out out, and put it back, then the theoretical and actual locations are not in the exact same position. So then you have to normalize so that the theoretical and actual are the same. That way when you move locations of wires, you move the theoretical wires. If you don’t normalize, then you only move the actual locations and not the theoretical locations.
2. Hybrid won't lie flat, causing it to vibrate while being wire bonded.
   • we had this problem for one of our hybrids, and so far we have been lucky enough that this has not happened again. To deal with this, we taped the edges of the hybrid to the wire bonding jig using kapton tape. This seemed to help, but it was not a perfect solution.
3. Wedge of wire bonder hits the ledge at the edge of the bond pads, or hits some surface component of the hybrid. This stops the wire bonder from reaching the wire bonding pads of the hybrid.
   • Solution: adjust the location of the bond foot. If this does not help, reverse the direction of the bond (so instead of bonding from ASIC to hybrid, bond from hybrid to ASIC).
4. For some reason the wedge does not reach the bond pad, but never hits any other component of the hybrid either. Error message ``Chip too low''.
   • Solution: Apparently this is a problem they sometimes get with the machine. The issue here has to do with how the wire bonder defines a search area. Basically, it defines an area in x, y, and z, within which it searches for the surface. If the wedge does not encounter any resistance within that search area, the program is stopped. To deal with this, you just extend the search area in z by increasing the overdrive. When we had this issue, we increased the overdrive from 200 to 500 so it searches lower than 500 from where it expects the surface. This worked, and we have not had this error since.
5. Wire bonds not sticking to the hybrid
   • This is an ongoing problem, though adjustments to wire bonding parameters through a DOE has increased our bond yield. There are many things that can contribute to a failed bond. The easiest thing to control is the cleanliness of the bond pads. When we first started working with hybrids, we had a lot of trouble with bonds sticking to the hybrid due to improper cleaning protocols. Basically, we wash the hybrids with a substance called SWAJ, which must then be rinsed off. Rinsing must be redone multiple times in order to ensure that all the SWAJ as washed off of the pads! We rinse once using the ultrasonic cleaner for about 20 min, and then twice by pouring water over the hybrids.
   • We have also found that plasma cleaning increases the bond yield dramatically. Tests to check that plasma cleaning does not negatively affect the ASICs are ongoing.
6. Adjusting the bond positions causes the wire to not stick, or the loop shape to deform
   
   • This can happen if you move the bond positions too much without then adjusting the expected length of the wire. The solution is to adjust the lengths of the bonds to take into account the position adjustments.
7. The wedge is larger than the bond pad size (see photo below).
   
   • Nothing much you can do here except continue to try to re-bond, eventually it might stick.